ALTERNATIVE GATE CIRCUITS

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Across
  1. 2. which uses a latch structure for the pullup
  2. 5. Consumes no dynamic power
  3. 7. storage node may be pulled down, so output goes up
  4. 9. ----------- logic uses stored charge to help evaluation
  5. 11. Domino gates are also vulnerable to errors caused by-----------------
  6. 13. ----------- output is always at VDD
  7. 14. Simplest non-standard gate topology
Down
  1. 1. Domino gates cannot --------------
  2. 3. ------------------ can be sufficient to affect precharge node
  3. 4. Uses ------------ to compute output quickly
  4. 6. pseudo n-mos called as?
  5. 8. --------------- of PU helps speed of the transition
  6. 10. ------------output is above Vss
  7. 12. Advantage of the pseudonMOS gate