Combinational Logic Key Terms

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849
Across
  1. 1. A digital device consisting of several programmable sections with internal interconnections between the sections
  2. 3. Position of a binary bit that indicates whether that number represents a positive or a negative quantity
  3. 4. The JTAG signal that controls the downloading of test or programming data
  4. 6. Process used by CPLD design software to interpret design information (such as a schematic or text file) and create required programming information for a CPLD
  5. 8. Theorem stating that the complement of a sum (OR operation) equals the product (AND operation) of the complements
  6. 11. A binary number of fixed length with one bit that shows positive or negative
  7. 12. A sum term in a Boolean expression where all possible variables appear once in true or complement form
  8. 13. In a JTAG port, the serial input data to a device
  9. 14. Two-input logic circuit that produces a high output only when the inputs are different
  10. 15. The leftmost bit in a binary number is the Most _________ Bit.
  11. 17. Display of seven independently controlled light-emitting diodes (LED) or liquid crystal display (LCD) elements
  12. 19. A Truth Table lists all of these possible values to a digital circuit, in ascending binary order, and the output response for each combination
  13. 21. A circuit that uses a binary decoder to direct a digital signal from a single source to is one of several destinations
  14. 23. Term in a Boolean expression where one or more true or complement variables are ORed
  15. 24. An industry standard form of text file indicating which fuses are blown and which are intact in a programmable logic device
  16. 25. Adder circuit with three inputs and two outputs
  17. 27. An electronic circuit having many components, such as transistors, diodes, resistors, and capacitors, in a single package
  18. 28. A type of Boolean expression where several sum terms are multiplied (ANDed) together
  19. 32. Logic circuit that operates like an AND gate followed by an INVERTER
  20. 33. Base 16 number system
  21. 37. A standards body that developed the format for testing and programming devices while they are installed in a system
  22. 38. Class of PLDs that contain an array of more complex logic cells that can be very flexibly interconnected to implement high-level logic circuits
  23. 39. The specific PLD device for which a digital design is intended
  24. 40. A number system that has a base of 8; digits from 0 to 7
  25. 41. Term in a Boolean expression where one or more true or complement variables are ANDed
  26. 42. The rightmost bit of a binary number is the _____ Significant Bit.
  27. 43. Assigning internal PLD circuitry, and input and output pins, to a PLD design
  28. 44. A digital circuit that produces an output code depending on which of its inputs is activated
  29. 47. Test Clock
  30. 48. A graphical tool for finding the maximum SOP or POS simplification of a Boolean expression
  31. 49. In a JTAG port, the serial output data from a device
Down
  1. 2. Transferring design information from the computer running PLD design software to the actual PLD chip
  2. 5. Design entry can be done by entering a this or a text file that describes the required digital function.
  3. 7. A product term in a Boolean expression where all possible variables appear once in true or complement form
  4. 9. Two-input logic circuit that produces a high output only when the inputs are equal
  5. 10. Two cells in a K-map are ______ if there is only one variable that is different between the coordinates of the two cells.
  6. 16. Each segment of a common ______ display is illuminated by a logic LOW.
  7. 18. A type of Boolean expression where several product terms are summed (ORed) together
  8. 20. Digital integrated circuit that can be programmed by the user to implement any digital logic function
  9. 22. In the acronym JEDEC, the first E stands for ___________.
  10. 23. A PLD with a few hundred logic gates and possibly a few programmable macrocells available
  11. 26. Property that allows us to distribute (“multiply through”) an AND across several OR functions. For example, a(b+c)=ab+ac
  12. 29. A printed specification giving details of the pin configuration, electrical properties, and mechanical profile of an electronic device
  13. 30. A detailed description, especially one providing information needed to make, build, or produce something
  14. 31. Adder circuit with two inputs and two outputs
  15. 32. Logic circuit that operates like an OR gate followed by an INVERTER
  16. 34. The 2’s ¬¬¬¬¬________ is a form of signed binary notation in which negative numbers are created by adding 1 to the 1’s complement form of the number
  17. 35. A circuit that directs one of several digital signals to a single output, depending on the states of several select inputs
  18. 36. The smallest unit of Karnaugh map
  19. 45. A logic HIGH illuminates a segment of a common ¬¬¬¬______ display.
  20. 46. A Don’t ¬¬¬¬______ Condition occurs when a circuit’s output level for a given set of input conditions can be assigned as either a 1 or 0.