UNIT 4 & 5 CROSSED

Across

4. Process of interpreting CPU commands for devices
6. Hardware that manages direct memory access operations
8. Signal that notifies CPU an event requires attention
10. Interface pathway that connects CPU, memory, and I/O devices
12. I/O addressing technique sharing memory address space
14. Temporary storage used during I/O transfers

Down

1. Register in I/O module indicating device readiness or errors
2. Carries control signals like read/write between CPU and I/O
3. I/O addressing technique using separate address space
5. Pathway used for transferring actual data
7. Function that identifies transmission errors
8. Hardware component that manages communication between CPU and peripherals
9. Technique where CPU repeatedly checks device status
11. Unique identifier for an I/O device in isolated addressing
13. External device connected to a computer for input/output

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