DEL_unit2_crossword_21325

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Across
  1. 1. The circuit with two or more multiplexers connected to obtain the multiplexer with more number of inputs is known as multiplexer _____.
  2. 4. ______ is also known as reflected binary code
  3. 7. It refers to a process where large Multiplexers can be designed and implemented using smaller Multiplexers.
  4. 9. Parity Generator is a combinational logic circuit that generates the parity bit in the _______ .
  5. 12. Multiplexer is a _______ circuit which accepts multiple analog signals or digital data streams and combines into one signal and transmits over a shared medium.
  6. 13. A _______ is a multiple-input, multiple-output logic circuit which converts coded inputs into coded outputs, where the input and output codes are different.
  7. 15. MSI, is a category of ICs, which stands for "Medium Scale ______".
  8. 16. Demultiplexer is also known as "data ______".
Down
  1. 2. A Parity Checker checks the parity in the _______.
  2. 3. The time delay in ripple carry propagation is called as the _____ delay.
  3. 5. Multiplexer is also known as a "data _____".
  4. 6. It is added to the word containing data in order to make number of 1s either even or odd
  5. 8. In subtraction of bits (A-B), B is called as the ______ bit.
  6. 10. The phenomenon in which the carry is said to be propagated like ripple from the LSB stage to the MSB stage is called _____ carry propagation.
  7. 11. In subtraction of bits (A-B), A is called as the ______ bit.
  8. 12. A ______ is a combinational circuit that gives output in terms of A>B, A<B, A = B
  9. 14. A pin in multiplexer which disables or enables the multiplexer.