ECE2072
Across
- 2. Most digital applications
- 7. Perform logical computations
- 12. Clock unsynced
- 14. Real-life problems
- 16. Software
- 18. Temporary variable in Verilog
- 21. A block in Verilog
- 22. Reduction method
- 24. Hardware Description Language
- 25. Two digits only
- 26. Easy to modify in Verilog
- 28. A type of map
- 29. Edge-triggered
Down
- 1. State output
- 3. A bus of bits
- 4. State reduction
- 5. Negative
- 6. No other way
- 8. All possible combinations
- 9. One become many
- 10. Term reduction
- 11. Glitch
- 13. Dynamic & timing analysis
- 15. Sequence independent
- 17. Design type
- 19. Name of theorems
- 20. Discreet values
- 23. Level-triggered
- 27. Many into one
- 30. Minterm or maxterm