ICDET - 3a

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Across
  1. 4. Condition for NMOS inverter is that R2 much ____ than R1
  2. 6. Delays will affect the operating ____ of a digital circuit
  3. 9. L/W is known as the ___ ratio Z, of a transistor
  4. 11. Most basic element in building logic circuits
  5. 12. For NMOS inverters, pull-up load is constructed from a ____ mode transistor
  6. 13. ___ are used to select or control the flow of signals
Down
  1. 1. Electron ____ is about twice that of hole’s
  2. 2. Zpu/Zpd is known as the ___ ratio
  3. 3. How fast a signal can go from ‘1’ to ‘0’ is known as ___ time
  4. 5. After calculating Ids1 and Ids2, next is to put Ids1 ___ to Ids2
  5. 7. One of the advantages of CMOS inverters
  6. 8. Different inverter designs will yield different overall area, ___ and power consumption
  7. 10. For NMOS inverters, output voltage can never reach a ____ 0V