Malware Analysis Set 2

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Across
  1. 2. Eight 32-bit GPRs in x86 core (9 letters)
  2. 7. Source index for string copies (3 letters)
  3. 8. Software invoked exception like INT (4 letters)
  4. 9. Atomically add one to operand (3 letters)
  5. 10. ESP role in LIFO management (9 letters)
  6. 12. GHz measure of instruction throughput (9 letters)
  7. 14. 32-bit data path in classic x86 (8 letters)
  8. 17. First stage pulling instruction from memory (5 letters)
  9. 20. Counter for LOOP and REP instr (3 letters)
  10. 22. Overlap fetch/decode/execute stages (8 letters)
  11. 23. Base register for memory offsets (3 letters)
  12. 24. L1/L2 speedup for frequent data access (5 letters)
  13. 26. Second stage parsing opcode and operands (6 letters)
  14. 28. Sums operands setting flags (6 letters)
Down
  1. 1. Initial bytes defining instr type (6 letters)
  2. 3. Destination index for string ops (3 letters)
  3. 4. Subtract one updating ZF (3 letters)
  4. 5. Page not present triggering handler (5 letters)
  5. 6. Firmware translating complex instr (8 letters)
  6. 11. Decrements ESP stores value (4 letters)
  7. 13. Base for parameter passing (3 letters)
  8. 15. Difference with borrow flag (6 letters)
  9. 16. Hardware signal pausing CPU for I/O (9 letters)
  10. 18. Dividend high half for DIV instr (3 letters)
  11. 19. Two's complement negation (3 letters)
  12. 21. Third stage performing ALU operation (7 letters)
  13. 25. Transfers data between reg/mem (3 letters)
  14. 27. Accumulator for arithmetic results (3 letters)