Peer To Peer Crossword Puzzle Activity

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Across
  1. 2. the smallest piece of computer code that can be independently scheduled for execution
  2. 5. Internal computer hardware that manages the data going into and loaded from the computer’s cache memory
  3. 12. The description of the internal circuitry of a CPU that defines characteristics such as the technology used to create the chip, the supported instruction set, and the bit size
  4. 13. The numeric code read by the CPU that represents a particular machine instruction
  5. 16. A computer that uses more than one CPU
  6. 18. A path or channel between a computer’s CPU and the devices it manages, such as memory and I/O devices
  7. 19. A computer program that translates assembly code into numeric values called opcodes that the CPU can understand
  8. 20. The part of a processor used to read and execute instructions
Down
  1. 1. A component of a CPU that executes instructions
  2. 3. A feature of some Intel CPUs that allows two threads to run on each CPU core simultaneously
  3. 4. A register on a CPU that contains the address of the next instruction the CPU will execute
  4. 6. A component of a CPU that provides timing and coordination between the other parts of the CPU, such as the arithmetic logic unit, registers, and system bus
  5. 7. A memory address that a CPU begins reading from whenever the CPU receives a reset signal, such as when power is first applied or someone presses the reset button on a computer
  6. 8. The computer hardware design that includes the processor (CPU) and communication routes between the CPU and the hardware it manages, such as memory and disk storage
  7. 9. A computer program that takes a high-level language like C++ or Java and turns it into assembly code that is executed by the CPU
  8. 10. Special computer memory that temporarily stores data used by the CPU. Cache memory is physically close to the CPU and is faster than standard system memory, enabling faster retrieval and processing time
  9. 11. A small program inside a CISC CPU that must interpret and execute each instruction
  10. 14. An internal communications pathway inside a computer that specifies the source and target address for memory reads and writes
  11. 15. A storage location associated with an I/O device that data can be read from and written to; a temporary holding location in a CPU where data must be placed before the CPU can use it
  12. 17. A CPU design that permits the processor to operate on one instruction at the same time it is fetching one or more subsequent instructions from the operating system or application