Computer Architecture and Organization

4. Cache memory is updated in parallel if it contains the word at the specified address.
7. Each word of cache can store 2 or more words of memory under the same index address.
8. Secondary cache in multilevel cache architecture.
10. A type of RAM that consists of circuits that are capable of retaining their state as long as the power is applied.
11. A cache like quick reference for page table.
12. Map An address map indicating memory component and address bus representation.
15. Any block location in cache can store any block in memory.
16. A referenced item is found in the cache by the processor.
17. A small unit of physical memory space.
18. A type of buffer register.
19. Time to retrieve the first word of the block.
20. A page replacement algorithm.

1. It must decide which page in main memory ought to be removed to make a new room for a new page.
2. Items whose addresses are near one another tend to be referenced close together in time.
3. We can predict with reasonable accuracy what instructions and data a program will use in the near future based on its accesses in the recent past.
5. Replace that block in the set that has been in the cache longest with no reference to it.
6. Memory is not up-to-date, i.e., the same item in cache and memory may have different value.
9. Additional cycles required to serve the miss.
13. Single bit error correction method.
14. Permits the user to construct programs as though a large memory space were available.