Digital VLSI Design

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  1. 3. Width of PMOS is always.....than NMOS transistors in static CMOS circuit to achieve equal rise and fall time.
  2. 5. ....problem of Dynamic logic get overcome in Domino logic.
  3. 7. I am the fastest adder(write my name in short)
  4. 8. I am passing weak logic 1 and strong logic 0 when used as switch.
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  1. 1. Let in one PTL circuit MOS transistors required to implement it are two. If we transfer this circuit to TG logic, how many MOS transistors are required?
  2. 2. I am CMOS family logic style where number of NMOS and PMOS transistors required to design circuit are same.
  3. 4. The logic whose output is not dependent on size of NMOS and PMOS transistors is called ......logic.
  4. 6. Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR?