Across
- 4. It is a collections of processing elements that cooperate and communicate to solve large problems fast.
- 9. In the point-of-view of a system administrator, they are more concerned with __________.
- 12. A part of Intel Core Duo that accepts I/O interrupts and routes these to the appropriate core.
- 17. It is the process of breaking your code into small chunks and timing each of these chunks to determine which of them consume the most time.
- 18. It is useful for assessing performance improvements obtained by upgrading a computer or its components.
- 20. A memory architecture which is scalable and no overhead cache coherency.
Down
- 1. It is a quantitative science that gives us ways to rate the overall performance of a system and its constituent components.
- 2. A principle that states that performance increase is roughly proportional to square root of the increase in complexity.
- 3. It is a metric used in computers that measures the rate at which the system can execute a typical mix of floating-point and integer arithmetic instructions, as well as logical operations.
- 5. Register banks are replicated so that multiple threads can share the use of pipeline resources.
- 6. A part of Intel Core i7 that enables high-speed communications among connected processor chips.
- 7. It is a type of partitioning wherein tasks are equally divided.
- 8. Under shared memory, the processors have the same access time.
- 10. A step in designing parallel algorithms that groups tasks into larger tasks.
- 11. A mathematical preliminary that indicates the expected behavior of the samples system (population).
- 13. It is the distribution work among tasks so that all tasks are kept busy all of the time.
- 14. It is software capability that enables a program to work with multiple threads at the same time instead of waiting on other threads.
- 15. It is the amount of time required to coordinate parallel task.
- 16. A mathematical preliminary that gives consistent number with which to perform comparisons regardless of the distribution of data.
- 19. It is an alternative architecture that combines 2 or more processors on single piece of silicon.