ICDET - 3a

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Across
  1. 1. Condition for NMOS inverter is that R2 much ____ than R1
  2. 3. Electron ____ is about twice that of hole’s
  3. 7. For NMOS inverters, pull-up load is constructed from a ____ mode transistor
  4. 10. Zpu/Zpd is known as the ___ ratio
  5. 11. After calculating Ids1 and Ids2, next is to put Ids1 ___ to Ids2
  6. 13. L/W is known as the ___ ratio Z, of a transistor
Down
  1. 2. One of the advantages of CMOS inverters
  2. 4. Delays will affect the operating ____ of a digital circuit
  3. 5. ___ are used to select or control the flow of signals
  4. 6. Most basic element in building logic circuits
  5. 8. For NMOS inverters, output voltage can never reach a ____ 0V
  6. 9. How fast a signal can go from ‘1’ to ‘0’ is known as ___ time
  7. 12. Different inverter designs will yield different overall area, ___ and power consumption