ICDET - 3a

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Across
  1. 1. Different inverter designs will yield different overall area, ___ and power consumption
  2. 4. Delays will affect the operating ____ of a digital circuit
  3. 6. One of the advantages of CMOS inverters
  4. 8. How fast a signal can go from ‘1’ to ‘0’ is known as ___ time
  5. 9. Most basic element in building logic circuits
  6. 10. Condition for NMOS inverter is that R2 much ____ than R1
  7. 12. For NMOS inverters, output voltage can never reach a ____ 0V
Down
  1. 1. ___ are used to select or control the flow of signals
  2. 2. For NMOS inverters, pull-up load is constructed from a ____ mode transistor
  3. 3. Electron ____ is about twice that of hole’s
  4. 5. After calculating Ids1 and Ids2, next is to put Ids1 ___ to Ids2
  5. 7. Zpu/Zpd is known as the ___ ratio
  6. 11. L/W is known as the ___ ratio Z, of a transistor