Malware Analysis Set 2

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Across
  1. 1. Overlap fetch/decode/execute stages (8 letters)
  2. 3. Difference with borrow flag (6 letters)
  3. 5. Two's complement negation (3 letters)
  4. 7. Atomically add one to operand (3 letters)
  5. 9. Software invoked exception like INT (4 letters)
  6. 11. Initial bytes defining instr type (6 letters)
  7. 14. Transfers data between reg/mem (3 letters)
  8. 16. Eight 32-bit GPRs in x86 core (9 letters)
  9. 17. Source index for string copies (3 letters)
  10. 18. GHz measure of instruction throughput (9 letters)
  11. 22. Second stage parsing opcode and operands (6 letters)
  12. 23. Base register for memory offsets (3 letters)
  13. 24. Counter for LOOP and REP instr (3 letters)
  14. 25. Third stage performing ALU operation (7 letters)
Down
  1. 2. Decrements ESP stores value (4 letters)
  2. 4. Hardware signal pausing CPU for I/O (9 letters)
  3. 6. ESP role in LIFO management (9 letters)
  4. 8. L1/L2 speedup for frequent data access (5 letters)
  5. 10. Sums operands setting flags (6 letters)
  6. 12. 32-bit data path in classic x86 (3 letters)
  7. 13. Page not present triggering handler (5 letters)
  8. 14. Firmware translating complex instruction (8 letters)
  9. 15. First stage pulling instruction from memory (5 letters)
  10. 17. Accumulator for arithmetic results (3 letters)
  11. 19. Dividend high half for DIV instr (3 letters)
  12. 20. Destination index for string ops (3 letters)
  13. 21. Subtract one updating ZF (3 letters)
  14. 24. Base for parameter passing (3 letters)