Symmetric and Distributed Shared Memory Architectures, Cache coherence

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Across
  1. 3. through data is written in the cache and the corresponding main memory location at same time is called (12 letters, 2 words)
  2. 5. Width a number of simultaneous connection or connectivity in toroidal mesh interconnects. (14 letters with 2 words)
  3. 6. Language provide some of the mechanism of shared memory programs.
  4. 7. A collection of commodity systems connected by interconnection networks (7 Letters)
  5. 9. the worker of CPU(3 Letters)
  6. 11. Multiple simultaneous instruction streams operating on multiple data stream(4 Letters)
Down
  1. 1. data structure used in directory based cache coherence is (9 Letters)
  2. 2. Processor A processor that is able to process sequences of data with a single instruction (16 letters with 2 words)
  3. 4. Unit the boss of CPU(11 letters with 2 words)
  4. 5. Communication wires are shared by the devices called (3 letters)
  5. 8. Applies the same instruction to multiple data items or it’s idle (4 Letters)
  6. 10. Time to access all the memory location will be same for all the core architecture (3 letters)